计算流体力学程序单核指令级优化方法

刘闯; 何峰; 肖兮; 董小社; 张兴军

doi:10.7652/xjtuxb201812012

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计算流体力学程序单核指令级优化方法

更新时间：2025-05-08

- 计算流体力学程序单核指令级优化方法
- A Single-Core Instruction-Level Optimization Method for Computational Fluid Dynamics Programs
- 西安交通大学学报 2018年52卷第12期页码：77-83
- 作者机构：
  
  西安交通大学计算机科学与技术系,西安,710049
- 作者简介：
- 基金信息：
  
  : 2018-06-13。作者简介: 刘闯(1993-),男,硕士生;董小社(通信作者),男,教授,博士生导师。基金项目: 国家重点研发计划资助项目(2016YFB0200902)
- DOI：10.7652/xjtuxb201812012
  中图分类号： TP302.7
- 网络首发：2018-12-10，
  
  纸质出版：2018
- 稿件说明：
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刘闯, 何峰, 肖兮, 等. 计算流体力学程序单核指令级优化方法[J]. 西安交通大学学报, 2018,52(12):77-83.

LIU Chuang, HE Feng, XIAO Xi, et al. A Single-Core Instruction-Level Optimization Method for Computational Fluid Dynamics Programs[J]. 2018, 52(12): 77-83.
刘闯, 何峰, 肖兮, 等. 计算流体力学程序单核指令级优化方法[J]. 西安交通大学学报, 2018,52(12):77-83. DOI： 10.7652/xjtuxb201812012.

LIU Chuang, HE Feng, XIAO Xi, et al. A Single-Core Instruction-Level Optimization Method for Computational Fluid Dynamics Programs[J]. 2018, 52(12): 77-83. DOI： 10.7652/xjtuxb201812012.

摘要

针对目前大多数计算流体力学程序对系统的单核计算能力利用不足

提出一种针对计算流体力学程序的单核指令级优化方法。该方法首先分析程序的性能指标存在潜在的性能不足

根据分析结果进行优化; 依据容器的存储特性和系统的访存特性

对程序的存储结构和访存顺序进行调整

以优化空间开销和访存性能; 对CPU的流水机制进行分析

在循环和分支中消除指令的控制相关和数据相关从而达到减少流水中断率的目的; 分析编译器对高级语言的处理特点并结合系统中的运行时栈在指令级作出分析

优化指令结构从而减少指令冗余和降低指令复杂度。实验结果表明

在TIANHE-1A超级计算机系统上进行测试

与优化前程序相比

优化后的程序执行时间约减少68.34%

空间消耗约减少55.43%。通过对程序性能各项指标进行分析的结果表明

程序在流水中断率、缓存命中率及机器指令数等性能指标上均有大幅地提升

该方法优化覆盖范围多于目前其他优化方法

有较好的优化效果

在计算流体力学程序优化研究中具有一定的借鉴价值。

Abstract

A single-core instruction-level optimization method for computational fluid dynamics(CFD)programs is proposed to overcome the shortage of most current CFD programs in utilizing the single-core computing power of a system. The method first analyzes the performance indicators of a program to find potential performance deficiencies

and then optimizes them according to the analysis results. Then the memory structure and memory access sequence are adjusted according to the memory access characteristics of the system and the container to optimize memory access performance and space overhead. The pipeline mechanism of CPU is analyzed

and the control correlation and data correlation of instructions in loops and branches are eliminated to reduce the pipeline interruption rate. Both the characteristics of a compiler processing the high-level language and the runtime stack at the instruction level are analyzed to optimize the instruction structure and to reduce instruction redundancy and duplication. Experimental results show that the performance of the optimized program is greatly improved. Testings on TIANHE-1A supercomputer system show that the execution time of the program reduces by 68.34% and the space consumption reduces by 55.43%. Analyses show that the performance of the program is greatly improved in pipeline interruption rate

cache hit rate and number of machine instructions. It shows that the proposed method has more coverage than other existing optimization methods and better optimization effect

and has a good reference value.

关键词

Keywords

references

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