西安交通大学微电子学院,西安,710049
网络首发:2017-08-10,
纸质出版:2017
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王玉伟, 张鸿, 张瑞智. 一种超低功耗的低电压全金属氧化物半导体基准电压源[J]. 西安交通大学学报, 2017,51(8):47-52+76.
A Low-Voltage All-Metal Oxide Semiconductor Voltage Reference with Ultra-Low Power[J]. 2017, 51(8): 47-52+76.
王玉伟, 张鸿, 张瑞智. 一种超低功耗的低电压全金属氧化物半导体基准电压源[J]. 西安交通大学学报, 2017,51(8):47-52+76. DOI: 10.7652/xjtuxb201708008.
A Low-Voltage All-Metal Oxide Semiconductor Voltage Reference with Ultra-Low Power[J]. 2017, 51(8): 47-52+76. DOI: 10.7652/xjtuxb201708008.
针对传统带隙基准电源电压高、功耗高和面积大的问题
提出了一种超低功耗的低电压全金属氧化物半导体(MOS)基准电压源。该基准源通过电压钳制使MOS管工作在深亚阈值区
利用亚阈值区MOS管的阈值电压差补偿热电势的温度特性
同时采用负反馈提高了电压源的线性度与电源抑制比。整个电压源电路采用SMIC 0.18 μm互补金属氧化物半导体工艺设计
仿真结果表明:基准电压源的电源电压范围可达0.5~3.3 V
线性调整率为0.428%V
-1
功耗最低仅为0.41 nW; 在1.8 V电源电压、-40~125 ℃温度范围内
温度系数为4.53×10
-6
℃
-1
输出电压为230 mV; 1 kHz下电源抑制比为-60 dB
芯片版图面积为625 μm
2
。该基准电压源可满足植入式医疗、可穿戴设备和物联网等系统对芯片的低压低功耗要求。
A low-voltage all-metal oxide semiconductor(MOS)voltage reference with ultra-low power is presented to solve the problems of high supply voltage
high power consumption and large chip area in conventional band-gap references. The reference enforces all transistors to operate in the deep sub-threshold region through a voltage clamping technique
and the reference voltage is obtained by compensating the temperature characteristic of the thermal voltage with the difference of threshold voltages between two MOS transistors in sub-threshold region. Meanwhile
the linearity of the voltage reference and power supply rejection ratio are enhanced via negative feedback in the circuit
which is designed using the S
MIC 0.18 μm complementary metal oxide semiconductor process. Simulation results show that the reference circuit is able to operate within 0.5-3.3 V voltage range of power supply with a linear regulation of 0.428%V
-1
and the lowest power consumption is merely 0.41 nW. When the power supply voltage is 1.8 V in a temperature range from -40 to 125 ℃
the temperature coefficient is 4.53×10
-6
℃
-1
the output voltage of the reference is 230 mV
and the power supply rejection ratio is -60 dB at 1 kHz frequency
while the layout area of the core circuit is only 625 μm
2
. The voltage reference can be used in the systems that require low voltage and low power consumption
such as implantable medical devices
wearable devices
and Internet of Things
etc.
余国义. 低压低功耗CMOS基准参考源的设计 [D]. 武汉: 华中科技大学, 2006: 10-12.
张鸿, 张牡丹, 张杰, 等. 用于植入式医疗装置的逐次逼近式模数转换器 [J]. 西安交通大学学报, 2015, 49(2): 43-48.
ZHANG Hong, ZHANG Mudan, ZHANG Jie, et al. A successive approximation register analog-to-digital converter for implantable biomedical device [J]. Journal of Xi'an Jiaotong University, 2015, 49(2): 43-48.
张鸿, 陈贵灿, 程军, 等. 流水线模数转换器中高速低功耗开环余量放大器的设计 [J]. 西安交通大学学报, 2008, 42(6): 751-755.
ZHANG Hong, CHEN Guican, CHENG Jun, et al. Low power and high speed open-loop residue amplifier for pipelined analog-to-digital converter [J]. Journal of Xi'an Jiaotong University, 2008, 42(6): 751-755.
MA B, YU F Q. A novel 1.2-V 4.5-ppm/℃ curvature-compensated CMOS bandgap reference [J]. IEEE Transactions on Circuits Systems: I Regular Papers, 2014, 61(4): 1026-1035.
TAN X L, CHAN P K, DASGUPTA U. A sub-1-V 65-nm MOS threshold monitoring-based voltage reference [J]. IEEE Transactions on Very Large Scale Integration Systems, 2015, 23(10): 2317-2321.
LEE I, SYLVESTER D, BLAAUW D. A subthreshold voltage reference with scalable output voltage for low-power IOT systems [J]. IEEE Journal of Solid State Circuits, 2017, 52(5): 1443-1449.
闫志光. 低压低温度系数高电源抑制比的带隙基准源设计 [D]. 沈阳: 辽宁大学, 2012: 13-15.
曾衍瀚, 黄毅荣, 李毓鳌, 等. 超低功耗亚阈值CMOS电压基准电路 [J]. 微电子学, 2014(3): 301-304.
ZENG Yanhan, HUANG Yirong, LI Yuao, et al. Ultra-low power sub-threshold CMOS voltage reference [J]. Microelectronics, 2014,(3): 301-304.
GE G, ZHANG C, HOOGZAAD G, et al. A single-trim CMOS bandgap reference with a 3σ inaccuracy of ±0.15% from -40 ℃ to 125 ℃ [J]. IEEE Journal of Solid State Circuits, 2011, 46(11): 2693-2701.
OSAKI Y, HIROSE T, KUROKI N, et al. 1530-1538.
YANG B D. 250-mV supply subthreshold CMOS voltage reference using a low-voltage comparator and a charge-pump circuit [J]. IEEE Transactions on Circuits Systems: II Express Briefs, 2014, 61(11): 850-854.
WANG Lidan, ZHAN Chenhang, LI Guofeng. An ultra-low power and offset-insensitive CMOS subthreshold voltage reference [C]∥2016 IEEE Asia Pacific Conference on Circuits and Systems. Piscataway, NJ, USA: IEEE, 2016: 243-246.
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