A self-heating effect model for vacuum gate dielectric vertical-stacked silicon nanowires(SiNWs)gate-all-around field-effect transistors(GAA FETs)considering scale effect is proposed to address intensified influences of thermal transport scale effect on self-heating effect in nanoscale MOSFETs. Firstly
the relationships between phonon scattering free paths in silicon film and SiNW are analyzed
and the SiNW thermal conductivity attenuation factor used to measure the revealing phonon boundary scattering is quantified. Then an analytical model of the thermal conductivity of SiNW considering the influence of scale effect is derived based on the current international analytical model for nanoscale silicon films. Finally
the self-heating effect model considering the scale effect is established for GAA SiNWs FET by combining with the critical path of heat transfer in nanoscale devices. The proposed model is used to realize numerical simulation of the self-heating effect of GAA SiNWs FET in TCAD software. Simulation results show that the vacuum gate dielectric with low thermal conductivity
vertical stacked multiple heat sources and thermal transport scale effect lead to more complex heat generation and diffusion processes in vacuum gate dielectric GAA SiNWs FET
and aggravate the self-heating effect of devices. The thermal transport capacity of gate can be maximized through the compromise design between vacuum gate gap and surrounding gas pressure and the self-heating effect of the device can be inhibited to improve the performance and reliability of device. Compared with the hot spot temperature estimated by the traditional self-heating effect model
the hot spot temperature in the vacuum gate device predicted by the proposed model increases by 30%
indicating that the proposed model can effectively reveal the thermal transport scale effect of SiNW in GAA FET.
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