A Readout Circuit for Femtofarad-Level Capacitive Sensors with Parasitic Capacitance Suppression

doi:10.7652/xjtuxb202105017

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A Readout Circuit for Femtofarad-Level Capacitive Sensors with Parasitic Capacitance Suppression

更新时间：2025-07-09

- A Readout Circuit for Femtofarad-Level Capacitive Sensors with Parasitic Capacitance Suppression
- Vol. 55, Issue 5, Pages: 154-161(2021)
- 作者机构：
  
  西安交通大学微电子学院,西安,710049
- 作者简介：
- 基金信息：
- DOI：10.7652/xjtuxb202105017
  CLC： TN432
- Online First：10 May 2021，
  
  Published：2021
- 稿件说明：
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A Readout Circuit for Femtofarad-Level Capacitive Sensors with Parasitic Capacitance Suppression[J]. 2021, 55(5): 154-161.
DOI：

A Readout Circuit for Femtofarad-Level Capacitive Sensors with Parasitic Capacitance Suppression[J]. 2021, 55(5): 154-161. DOI： 10.7652/xjtuxb202105017.

摘要

针对芯片制造和应用环境引入的大寄生电容严重降低飞法级电容传感器读出电路输出动态范围的问题

提出了一种带有自动增益控制的电容传感器全差分读出电路。该电路采用基于开关电容电路实现电容电压转换

利用带3位自动增益控制的全差分放大器放大传感器信号并自适应地抑制大寄生电容产生的电压; 放大器输出的差分电压信号由一个12位逐次逼近型模数转换器转换为数字量并输出。该电路采用0.18 μm CMOS工艺设计实现

电源电压为3.3 V。仿真结果表明

该电路的电容检测范围大于1 pF

检测精度小于1 fF

能容忍的寄生电容范围为2～10 pF

单次测量时间为1.2 ms。该电路的功耗为1.8 mW

版图面积为1.2 mm×0.89 mm

可应用在电容型触摸屏和微型加速度计等设备中以提高电容测量的精度。

Abstract

In order to resolve the problem that the dynamic range of the readout circuit for femto-level capacitive sensors is severely decreased by the relatively large parasitic capacitance caused by chip fabrication process and application environment

this paper proposes a fully differential readout circuit for capacitive sensors with automatic gain control. A switched capacitor sensing circuit is employed to realize capacitance-voltage conversion and a fully differential amplifier with 3-bit automatic gain control is then adopted to amplify the sensor signal while adaptively suppressing the voltage generated by the large parasitic capacitance. The differential output voltage of the amplifier is converted into digital output by a 12-bit successive approximation AD converter. This circuit is designed by 0.18 μm CMOS technology with 3.3 V power supply. Simulation results show that the proposed readout circuit achieves detection range larger than 1 pF

detection accuracy less than 1 fF

parasitic capacitance tolerance range of 2-10 pF

and measurement time of 1.2 ms. The circuit has 1.8 mW power consumption and 1.2 mm×0.89 mm silicon area

and can be applied in applications such as capacitive touch screens and mini-accelerators to improve the measurement accuracy.

关键词

Keywords

references

钟龙杰. 飞法级MEMS电容型传感器读出技术研究 [D]. 西安: 西安电子科技大学, 2019: 1-31.

杨洋, 张瑞智, 张杰, 等. 植入式医疗装置的无线通信和能量收集电路 [J]. 西安交通大学学报, 2018, 52(7): 160-166.

YANG Yang, ZHANG Ruizhi, ZHANG Jie, et al. A wireless communication and energy harvesting circuit for implantable medical devices [J]. Journal of Xi'an Jiaotong University, 2018, 52(7): 160-166.

陈阳, 张瑞智, 金锴, 等. 采用电荷平衡模数转换器的高精度CMOS温度传感器 [J]. 西安交通大学学报, 2018, 52(10): 124-131.

CHEN Yang, ZHANG Ruizhi, JIN Kai, et al. A CMOS temperature sensor with high precision using a charge balance analog-to-digital converter [J]. Journal of Xi'an Jiaotong University, 2018, 52(10): 124-131.

陈浩, 孙权, 张鸿, 等. 用于超低频信号测量的高精度低功耗增量式模数转换器 [J]. 西安交通大学学报, 2017, 51(6): 79-85.

CHEN Hao, SUN Quan, ZHANG Hong, et al. Incremental analog-to-digital converter with high resolution and low power for measurement of ultra-low-frequency signals [J]. Journal of Xi'an Jiaotong University, 2017, 51(6): 79-85.

SHIAH J, RASHTIAN H, MIRABBASI S. A low-noise parasitic-insensitive switched-capacitor CMOS interface circuit for MEMS capacitive sensors [C]∥Proceedings of the 2011 9th IEEE International New Circuits and Systems Conference. Piscataway, NJ, USA: IEEE, 2011: 470-473.

PARK J, HWANG Y, OH J, et al. A compact self-capacitance sensing analog front-end for a touch detection in low-power mode [C]∥Proceedings of the 2019 IEEE/ACM International Symposium on Low Power Electronics and Design. Piscataway, NJ, USA: IEEE, 2019: 1-6.

TAN Z, SHALMANY S, MEIJER G, et al. An energy-efficient 15-bit capacitive-sensor interface based on period modulation [J]. IEEE Journal of Solid-State Circuits, 2012, 47(7): 1703-1711.

OH S, LEE Y, WANG J, et al. A dual-slope capacitance-to-digital converter integrated in an implantable pressure-sensing system [J]. IEEE Journal of Solid-State Circuits, 2015, 50(7): 1581-1591.

GEORGE B, KUMAR J. Analysis of the switched-capacitor dual-slope capacitance-to-digital converter [J]. IEEE Transactions on Instrumentation and Measurement, 2010, 59(5): 997-1006.

HA H, SYLVESTER D, BLAAUW D, et al. A 160nW 63.9fJ/conversion-step capacitance-to-digital converter for ultra-low-power wireless sensor nodes [C]∥Proceedings of the 2014 IEEE International Solid-State Circuits Conference: Digest of Technical Papers. Piscataway, NJ, USA: IEEE, 2014: 220-221.

LI Bing, MA Linfa, WANG Wei, et al. A high-sensitivity signal conditioning interface for capacitive touch key using ΔΣ modulation [C]∥Proceedings of the 2017 International SoC Design Conference. Piscataway, NJ, USA: IEEE, 2017: 99-100.

王玉伟, 张鸿, 张瑞智. 一种超低功耗的低电压全MOS基准电压源 [J]. 西安交通大学学报, 2017, 51(8): 47-52.

WANG Yuwei, ZHANG Hong, ZHANG Ruizhi. A low-voltage all-metal oxide semiconductor voltage reference with ultra-low power [J]. Journal of Xi'an Jiaotong University, 2017, 51(8): 47-52.

WANG X, ZHANG H, ZHANG J, et al. A multi-cell battery pack monitoring chip based on 0.35-μm BCD technology for electric vehicles [J]. IEICE Electronics Express, 2015, 12(12): 1-12.

CELIN A, GEROSA A. Optimal DWA design in scaled CMOS technologies for mismatch cancellation in multibit ΣΔ ADCs [C]∥Proceedings of the 2015 IEEE International Symposium on Circuits and Systems. Piscataway, NJ, USA: IEEE, 2015: 1454-1457.

DONG L, LAN Z, GUI X, et al. A multi-channel 1.52 ubrms front end with orthogonal frequency chopping for neural recording applications [C]∥Proceedings of the 2019 IEEE Asia Pacific Conference on Circuits and Systems. Piscataway, NJ, USA: IEEE, 2019: 389-392.

张鸿, 张牡丹, 张杰, 等. 用于植入式医疗装置的逐次逼近式模数转换器 [J]. 西安交通大学学报, 2015, 49(2): 43-48.

ZHANG Hong, ZHANG Mudan, ZHANG Jie, et al. A successive approximation register analog-to-digital converter for implantable biomedical device [J]. Journal of Xi'an Jiaotong University, 2015, 49(2): 43-48.

ZHANG Hongshuai, ZHANG Hong, SUN Quan, et al. A 0.6-V 10-bit 200-kS/s SAR ADC with higher side-reset-and-set switching scheme and hybrid CAP-MOS DAC [J]. IEEE Transactions on Circuits and Systems: I Regular Papers, 2018, 65(11): 3639-3650.

LI Y, WANG R, LIU X, et al. A front-end integrated circuit design for tactile sensors [C]∥Proceedings of the 2019 IEEE International Conference on Integrated Circuits, Technologies and Applications. Piscataway, NJ, USA: IEEE, 2019: 146-147.

GEORGE A, LEE J, KONG Z, et al. A 0.8 V supply and temperature-insensitive capacitance-to-digital converter in 0.18 μm CMOS [J]. IEEE Sensors Journal, 2016, 16(13): 5354-5364.

TANG X, LI S, YANG X, et al. An energy-efficient time-domain incremental zoom capacitance-to-digital converter [J]. IEEE Journal of Solid-State Circuits, 2020, 55(11): 3064-3075.

刘青,查虹丽,马龙雄,等.采用多目标离散粒子群算法的地磁感应电流抑制措施的优化和效果评价.2021,55(3):90-98.[doi:10.7652/xjtuxb202103011]

倪娜,薛晓敏,张陵,等.高灵敏度离子皮肤手指关节角度传感器的设计.2021,55(3):164-174.[doi:10.7652/xjtuxb2021 03019]

朱瑞芳,张国梅,曹艳梅.三维信道模型约束下的大规模MIMO信道估计方法.2021,55(2):150-157.[doi:10.7652/xjtuxb202102018]

焦子豪,张瑞智,金锴,等.用于高速模数转换器的非对称全差分参考电压缓冲器.2020,54(5):109-116.[doi:10.7652/xjtuxb202005015]

许江涛,闫创,段颖哲,等.用于植入式医疗设备的低功耗低位逐次逼近型模数转换器.2020,54(3):12-19.[doi:10.7652/xjtuxb202003002]

李楠楠,黄正波,季惠才,等.用于高速模数转换器的电荷泵型低抖动时钟管理电路.2020,54(1):162-168.[doi:10.7652/xjtuxb202001020]

陈猛,乌江,焦朝勇,等.锂离子电池健康状态多因子在线估计方法.2020,54(1):169-175.[doi:10.7652/xjtuxb202002 021]

付远明,孟现阳,吴江涛.多路温度同步测量系统开发与实现.2017,51(3):62-67.[doi:10.7652/xjtuxb201703011]

严飞,李国兵,张国梅,等.大规模MIMO系统中单精度模数转换器的量化门限设置方案.2016,50(8):45-51.[doi:10.7652/xjtuxb201608008]

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