A novel multi-level two-dimensional 9/7 discrete wavelet transform(DWT)architecture with efficient memory is proposed to solve the problem that a large number of wavelet coefficients between the multi-level 2-D 9/7 DWT(2-D 9/7 DWT)module and the embedded block coding with optimized truncation(EBCOT)module need to be cached in the hardware implementation of JPEG2000 image compression and to decrease the cost of cache. A parallelizable basic processing unit is firstly designed based on the 9/7 DWT lifting scheme
and then a 2-D transform module is built. A novel block-based data scanning method is then adopted to scan combined blocks of an image so that the storage of wavelet coefficients between the modules is dramatically reduced. Finally
a unfolded multi-level 2-D DWT module is constructed according to the characteristics of data scanning. Experimental results and comparisons with existing hardware structures show that the proposed 3-level 2-D 9/7 DWT architecture saves at least 40% of storage resources for an image with the size of 512×512 pixels.
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