An embedded loop compensation method of LDO is proposed to solve the problem that the current buffer technique overcomes the drawback of traditional miller compensation
but consumes extra power. It merges the current buffer into the fold-back amplifier
so that the LDO circuit and the current buffer circuit share the transistor
and the loop stability of the circuit can be improved without adding the components. The principle of the proposed compensation method is analyzed and described in detail. The method is tested in a low-dropout voltage regulator using UMC 0.5 μm 5 V CMOS technology
and the results show that chip static power current has only 50 μA
and both the output voltage overshoot and undershoot are below 15 mV when the input voltage changes from 3 V to 5 V. The maximum change of the output voltage is less than 20 mV when the load resistance reduces from 18 kΩ to 9 Ω. The measurement results show that the embedded structure eliminates the extra power loss and improves loop stability.
ZHANG Xianku, YUAN Yang. Problem of block diagram algebra with unstable pole-zero cancellation [J]. Computing Technology and Automation, 2010, 29(3): 6-8.
BLAKIEWICZ G. Output-capacitor less low-dropout regulator using a cascoded flipped voltage follower [J]. IET Circuits Devices Systems, 2011, 5(5): 418-423.
AHUJA B K. An improved frequency compensation technique for CMOS operational amplifiers [J]. IEEE Journal of Solid-State Circuits, 1983, 18(6): 629-633.
RAJPUT S K, HEMANT B K. Two-stage high gain low power OpAmp with current buffer compensation [C]∥Proceedings of 2013 Global High Tech Congress on Electronics. Piscataway, NJ, USA: IEEE, 2013: 121-124.
ZABRODA O, MURMANN B. Eliminating complex conjugate poles in two-stage operational amplifiers with current buffer Miller compensation [J]. Analog Integration Circuit Signal Process, 2014, 81(2): 361-365.
WANG Wei, YAN Zushu, MAK P I. Micropower two-stage amplifier employing recycling current-buffer Miller compensation [C]∥Proceedings of 2014 IEEE International Symposium on Circuits and Systems. Piscataway, NJ, USA: IEEE, 2014: 1889-1892.
CHEN Yingyu, ZHENG Jinqi, WANG Huizhen. Research on a novel high-power buck converter using loss-less snubber [J]. Power Electronics, 2015, 49(6): 94-98.
SANSEN W M C. Analog design essentials [M]. Berlin, Germany: Springer Inc., 2006: 102-105.
GRAY P R, MEYER R G. MOS operational amplifier design: a tutorial overview [J]. IEEE Journal of Solid-State Circuits, 1982, 17(6): 969-982.
GARIMELLA A, FURTH P M, SURKANTI P R. Current buffer compensation topologies for LDOs with improved transient performance [J]. Analog Integrated Circuits and Signal Processing, 2012, 73(1): 131-142.
AL-SHYOUKH M, LEE H, PEREZ R. A transient-enhanced low-quiescent current low-dropout regulator with buffer impedance attenuation [J]. IEEE Journal of Solid-State Circuits, 2007, 42(8): 1732-1742.
BRIAN M K. Understanding the load-transient response of LDOs [J]. Analog Applications Journal, 2000(9): 19-23.
YEONG T L, CHI C U, MEI C J. A low dropout regulator using current buffer compensation technique [C]∥Proceedings of 2010 International Conference on Solid-State and Integrated Circuit Technology. Piscataway, NJ, USA: IEEE, 2010: 144-146.