A hybrid encoded successive approximation register(SAR)analog-to-digital converter(ADC)with constant common-mode control logic is presented to meet the requirements of ultra low power consumption and high resolution for implantable biomedical devices. The hybrid encoded structure of the split capacitive digital to analog converter(CDAC)employed in the SAR-ADC combines the low-power feature of binary encoded CDAC and the high-linearity advantage of thermometer encoded CDAC. The constant common-mode control logic has the advantage of ultra low dynamic power dissipation. The schematic and layout of a 10 bit SAR ADC are designed using the HHNEC 0.35 μm CMOS technology. Simulation results after layout parasitic extraction show that the pro
posed SAR-ADC operates under a power supply range of 1.8-3 V
and achieves an effective bit of 9.4 under a sampling rate of 10
3
s
-1
. The current consumption is only 60 nA
which is lower than those recently reported SAR ADCs with similar fabrication technologies. It can be concluded that the proposed converter is suitable for implantable devices such as cardiac pace makers.
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