A high accuracy fixed-width base-4 Booth(FBB-4B)multiplier is proposed to reduce the effect stemmed form the quantizing noise of multipliers on the channels detecting of Cognitive Radios and to save the area of a chip. The truncated partial-product in the FBB-4B multiplier is divided into three sections: reserved section
adaptive compensation section and constant compensation section. The compensation value of quantizing error(VQER)derived from the constant compensation section is incorporated into the adaptive compensation section
and the VQER of the adaptive compensation section is generated by the encoding of carry states in adaptive compensation section. The circuits for generating the compensation carry bits are then designed. Compared with the multipliers which all truncated partial-product bits are used for adaptive compensation
the adaptive partial-product bits in the FBB-4B multiplier are reduced
so that the error of the adaptive compensation is decreased
and the accuracy of the fixed-width multiplier is improved. Simulation results show that the quantizing accuracy of the FBB-4B multiplier is increased about 13% compared with the existing methods
and it saves up to 30% area compared with the ideal base-4 Booth multipliers.
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